Wednesday, May 20, 2015

Fetch decode execute cycle

The Fetch-Decode-Execute cycle of a computer is the process by which a computer: fetches a program instruction from its memory, determines what the instruction wants to do, and carries out those actions. This cycle is repeated continuously by the central processing unit (CPU), from bootup to when the computer is shut down. In modern computers this means completing the cycle billions of times a second! Without it nothing would be able to be calculated. Registers/circuits involved Edit

The circuits used in the CPU during the cycle are:

Program Counter (PC) - an incrementing counter that keeps track of the memory address of which instruction is to be executed next...

Memory Address Register (MAR) - the address in main memory that is currently being read or written

Memory Buffer Register (MBR) - a two-way register that holds data fetched from memory (and ready for the CPU to process) or data waiting to be stored in memory

Current Instruction register (CIR) - a temporary holding ground for the instruction that has just been fetched from memory

Control Unit (CU) - decodes the program instruction in the CIR, selecting machine resources such as a data source register and a particular arithmetic operation, and coordinates activation of those resources

Arithmetic logic unit (ALU) - performs mathematical and logical operations

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